The disadvantages of analog amplifiers are well known, and numerous mechanisms have been implemented in the art to overcome their deficiencies. Efforts to overcome the poor efficiency of analog amplifiers, among other things, gave rise to the development of relatively higher efficiency switching amplifiers. However, switching amplifiers have their own deficiencies, including difficulties in processing small signals without undesirable distortion. Binary switching amplifiers, in particular, are known to produce ripple in small output signals, when a modulation carrier frequency is removed from the amplified signal.
Mechanisms to improve upon the performance of binary switching amplifiers have involved implementing more output switching states. The conventional two output states of binary switching amplifiers have been supplemented, and performance has been improved by known switching amplifiers implementing third ("ternary") and fourth ("quaternary") output switching states. For instance, U.S. Pat. No. 5,077,539 ("the '539 patent") issued Dec. 31, 1991, owned by the present assignee and incorporated herein by reference, describes ternary and quaternary modes of switching operation implemented in an amplifier design to overcomes distortion affecting small signal inputs to the switching amplifier.
Ternary or tri-state mode waveforms represent input signal amplitude information as the timed width and polarity of pulses, comprising discrete amplitudes of zero, positive or negative polarity. With ternary techniques signal information is directly converted to appropriately wide pulses of positive or negative polarity.
The ternary implementation as disclosed in the referenced patent, however, contains an error source which precludes its use in audio or servo motor amplifier applications. This error source produces output signal distortion because of a nonlinearity in the output transfer function for small input signals, specifically as the input signal transitions through zero. For small input signals, performance degradation results because of the finite rise and fall times of the output signals produced by the power switching circuit. These switch times represent a fixed magnitude error, subtracted from a diminishing magnitude signal, which produces a nonlinear gain characteristic resulting in signal distortion.
In order to overcome the nonlinear behavior of the tri-state embodiment, it is known in the prior art to introduce a fourth state, specifically to linearize the output transition through zero. For small input signals, the four-state or quaternary embodiment, which is described in detail in the referenced patent, employs an analog amplifier to affect a linear transition through zero. This fourth output state employs a linear analog amplifier in conjunction with ternary switching to linearize small signal performance. Below a predetermined signal magnitude the load is switched to the linear analog amplifier and the ternary power switch is disabled. Above the magnitude threshold, the power switch is enabled and the load is disconnected from the linear amplifier. This compromise solution offers certain advantages, however, like the binary and ternary implementations it suffers particular disadvantages.
The ternary and quaternary techniques known in the prior art accept an analog input signal, which in those analog implementations requires no signal conversion means to interface to a linear analog amplifier. In those implementations, all signal processing uses analog means, i.e. analog circuitry is used to implement signal conversion, pulse width modulation control, and output linearization for small signals.
One significant disadvantage of using analog means according to the prior art to configure a switching amplifier having desired performance characteristics is that analog implementations are not the most cost effective. The nature of the analog circuitry involved is such that some of the circuitry is incompatible for purposes of integration with other of the analog circuits. For instance, high speed comparator circuitry is not cheaply nor easily integrated with high accuracy sampling circuitry onto a monolithic integrated circuit. Thus, although high performance objectives are nearly obtainable with analog implementations known in thee art, such implementations suffer a significant economic handicap in that compact, very large scale integrated circuits can not be used to economically implement analog designs. Reduction of costs and integration of individual circuit components is difficult, requiring circuits to be partitioned into several analog application specific integrated circuits (ASICs). It logically follows that where the circuitry can not easily and economically be configured in a monolithic integrated circuit, such a non-integrated configuration will require more space to implement.
Furthermore, for amplifier input signals that are inherently digital, as from the output of digital audio media, CD-ROM, digital control systems, or the like, the analog prior art requires signal conversion circuitry to interface with the analog switching amplifier implementation(s). Interface circuitry at the front end of the amplifier can degrade performance and further burden system cost.
Additionally, design constraints for the analog amplifier used in the fourth state of the quaternary implementation are severe, requiring several parameters to be matched to the tri-state amplifier. Significantly, the transfer function of the analog amplifier switched in, in the fourth state, must be matched to the ternary output. Also, the output impedance of the ternary amplifier and the analog amplifier for the quaternary mode must be matched. Consequently, mismatches in parameters results in distortion of the output signal in prior art amplifiers. Performance is further degraded by noise resulting from the switching in and out of the quaternary state analog amplifier. The analog amplifier required in the fourth state also necessitates provision of additional components, adding significantly to system cost.
Similarly, digital switching amplifiers known in the prior art suffer from various disadvantageous aspects. Amplifiers in the prior art fully implemented in the digital domain suffer signal degradation and distortion with low level input signals, as do the analog implementations. It is appreciated in the prior art that high performance objectives are theoretically achievable with an all digital implementation, as suggested in two Audio Engineering Society papers published by the Audio Engineering Society, entitled REALIZING AN ALL DIGITAL POWER AMPLIFIER, presented by R. E. Hiorns. J. M. Goldberg and M. B. Sandler at the 89th Convention of Audio Engineering Society, 1990, Los Angeles, Preprint #2960 and NEW RESULTS IN PWM FOR DIGITAL POWER AMPLIFICATION presented by J. M. Goldberg and M. B. Sandler at the 89th Convention of Audio Engineering Society, 1990, Los Angeles, Preprint #2959, respectively. However, as mentioned in the papers, "It should be noted that the non-idealities of the power switch are not included in the simulation." Reality dictates that the theoretically achievable performance of an all digital amplifier is asymptotically bounded by the performance of the power switch interacting with the load. The non-linearity of power switches in reality heretofore presented a significant impediment to achieving truly high performance and high fidelity in an all digital switching amplifier implementation.